<via />
Overview
A via is a plated hole that connects different layers of a PCB. Vias are commonly used to route traces between layers and for thermal management.
Vias do not have a schematic representation.
You generally do not need to manually create vias, they will be handled automatically by the autorouter.
Properties
| Property | Type | Default | Description |
|---|---|---|---|
| fromLayer | string | "top" | Starting layer for the via |
| toLayer | string | "bottom" | Ending layer for the via |
| holeDiameter | number | string | "0.4mm" | Diameter of the plated hole |
| outerDiameter | number | string | "0.8mm" | Outer diameter of the copper annular ring |
| tented | boolean | string | Inherits the board default | Select which sides have solder mask over the via. See Via tenting for accepted values. |
| pcbX | number | 0 | PCB X position of the via |
| pcbY | number | 0 | PCB Y position of the via |
| netIsAssignable | boolean | false | Marks the via as prefabricated so autorouters like laser_prefab can claim it for any compatible net. |
Via tenting
Use tented to control solder-mask coverage on each side of a via:
tented value | Top side | Bottom side |
|---|---|---|
true, "both_sides", or "top_and_bottom_tented" | Tented | Tented |
"top_tented" | Tented | Exposed |
"bottom_tented" | Exposed | Tented |
false or "exposed" | Exposed | Exposed |
The tented shorthand is equivalent to tented={true}. If you omit it, the
via inherits defaultViaTenting from its board.
With solder mask visible, Both sides and Top only have a mask-colored ring and a darkened center on the top side. Exposed and Bottom only have exposed copper there. The PCB preview below shows the top side with solder mask visible. Select Code to see the props used for each via.
Tenting does not fill the via or remove its physical drill hole. The darkened center represents the hole beneath the surface mask treatment; drill data is preserved for manufacturing.